
hello_world_semihosting_tiny.axf:     file format elf32-littlearm


Disassembly of section .text:

00000000 <g_pfnVectors>:
    printf_format( _debug_putchar, format, args );
}

static char debug_read_buf[DEBUG_INPUT_BUFFER_SIZE];
char *_debug_getstr(int *len)
{
   0:	f0 1f 00 10 3d 01 00 00 29 01 00 00 2d 01 00 00     ....=...)...-...
	...

    for(n=0;n<DEBUG_INPUT_BUFFER_SIZE;n++)
        debug_read_buf[n] = 0;

    if(ISDEBUGACTIVE())
        __read(0, debug_read_buf, DEBUG_INPUT_BUFFER_SIZE-1);
  2c:	31 01 00 00 00 00 00 00 00 00 00 00 35 01 00 00     1...........5...

    if(len)
        *len = small_strlen(debug_read_buf);
    return debug_read_buf;
}
  3c:	39 01 00 00                                         9...

00000040 <_debug_printf>:
	}
	return 0;
}

void _debug_printf(const char *format, ...)
{
  40:	b40f      	push	{r0, r1, r2, r3}
  42:	b500      	push	{lr}
  44:	b083      	sub	sp, #12
  46:	aa04      	add	r2, sp, #16
        __read(0, debug_read_buf, DEBUG_INPUT_BUFFER_SIZE-1);

    if(len)
        *len = small_strlen(debug_read_buf);
    return debug_read_buf;
}
  48:	ca08      	ldmia	r2!, {r3}
void _debug_printf(const char *format, ...)
{
    va_list args;

    va_start( args, format );
    printf_format( _debug_putchar, format, args );
  4a:	4805      	ldr	r0, [pc, #20]	(60 <_debug_printf+0x20>)
  4c:	1c19      	adds	r1, r3, #0
	}
	return 0;
}

void _debug_printf(const char *format, ...)
{
  4e:	9304      	str	r3, [sp, #16]
    va_list args;

    va_start( args, format );
  50:	9201      	str	r2, [sp, #4]
    printf_format( _debug_putchar, format, args );
  52:	f000 f893 	bl	17c <printf_format_nofloat>
}
  56:	b003      	add	sp, #12
  58:	bc08      	pop	{r3}
  5a:	b004      	add	sp, #16
  5c:	4718      	bx	r3
  5e:	46c0      	nop			(mov r8, r8)
  60:	000000b5 	.word	0x000000b5

00000064 <_debug_printf_flush>:

static char debug_write_buf[DEBUG_OUTPUT_BUFFER_SIZE];
static uint8_t debug_buf_read_index, debug_buf_write_index;

int _debug_printf_flush()
{
  64:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
  66:	2700      	movs	r7, #0
	uint8_t len, written;

	len = debug_buf_read_index <= debug_buf_write_index
  68:	4b0f      	ldr	r3, [pc, #60]	(a8 <_debug_printf_flush+0x44>)
  6a:	781a      	ldrb	r2, [r3, #0]
  6c:	4b0f      	ldr	r3, [pc, #60]	(ac <_debug_printf_flush+0x48>)
  6e:	781b      	ldrb	r3, [r3, #0]
  70:	429a      	cmp	r2, r3
  72:	d900      	bls.n	76 <_debug_printf_flush+0x12>
  74:	2352      	movs	r3, #82
  76:	1a9b      	subs	r3, r3, r2
  78:	b2de      	uxtb	r6, r3
			? debug_buf_write_index - debug_buf_read_index
			: DEBUG_OUTPUT_BUFFER_SIZE - debug_buf_read_index;

	if(!len)
  7a:	2e00      	cmp	r6, #0
  7c:	d011      	beq.n	a2 <_debug_printf_flush+0x3e>
		return 0;

	// The following if() disables semihosted writes when there is no hosted debugger
	// Otherwise, the target will halt when the semihost __write is called
	if(ISDEBUGACTIVE())
	    written = __write(0, &debug_write_buf[debug_buf_read_index], len);
  7e:	490c      	ldr	r1, [pc, #48]	(b0 <_debug_printf_flush+0x4c>)
  80:	2000      	movs	r0, #0
  82:	1889      	adds	r1, r1, r2
  84:	1c32      	adds	r2, r6, #0
  86:	f000 f9c7 	bl	418 <__write>
	else
            written = 0;

	debug_buf_read_index = (debug_buf_read_index + written) % DEBUG_OUTPUT_BUFFER_SIZE;
  8a:	4c07      	ldr	r4, [pc, #28]	(a8 <_debug_printf_flush+0x44>)
		return 0;

	// The following if() disables semihosted writes when there is no hosted debugger
	// Otherwise, the target will halt when the semihost __write is called
	if(ISDEBUGACTIVE())
	    written = __write(0, &debug_write_buf[debug_buf_read_index], len);
  8c:	b2c5      	uxtb	r5, r0
	else
            written = 0;

	debug_buf_read_index = (debug_buf_read_index + written) % DEBUG_OUTPUT_BUFFER_SIZE;
  8e:	7820      	ldrb	r0, [r4, #0]
  90:	2152      	movs	r1, #82
  92:	1828      	adds	r0, r5, r0
  94:	f000 f9e9 	bl	46a <__aeabi_idivmod>
  98:	7021      	strb	r1, [r4, #0]

	if(written != len)
  9a:	42b5      	cmp	r5, r6
  9c:	d102      	bne.n	a4 <_debug_printf_flush+0x40>
  9e:	19bf      	adds	r7, r7, r6
  a0:	e7e2      	b.n	68 <_debug_printf_flush+0x4>
		return written;
	return _debug_printf_flush() + written;
  a2:	2500      	movs	r5, #0
  a4:	1978      	adds	r0, r7, r5
}
  a6:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
  a8:	10000001 	.word	0x10000001
  ac:	10000000 	.word	0x10000000
  b0:	10000002 	.word	0x10000002

000000b4 <_debug_putchar>:

int _debug_putchar(char c)
{
  b4:	b570      	push	{r4, r5, r6, lr}
	uint8_t buffer_has_room = 1;

	if((debug_buf_write_index+1)%DEBUG_OUTPUT_BUFFER_SIZE  == debug_buf_read_index
  b6:	4b0e      	ldr	r3, [pc, #56]	(f0 <_debug_putchar+0x3c>)
		return written;
	return _debug_printf_flush() + written;
}

int _debug_putchar(char c)
{
  b8:	1c05      	adds	r5, r0, #0
	uint8_t buffer_has_room = 1;

	if((debug_buf_write_index+1)%DEBUG_OUTPUT_BUFFER_SIZE  == debug_buf_read_index
  ba:	7818      	ldrb	r0, [r3, #0]
  bc:	2152      	movs	r1, #82
  be:	3001      	adds	r0, #1
  c0:	f000 f9d3 	bl	46a <__aeabi_idivmod>
  c4:	4b0b      	ldr	r3, [pc, #44]	(f4 <_debug_putchar+0x40>)
  c6:	781b      	ldrb	r3, [r3, #0]
  c8:	4299      	cmp	r1, r3
  ca:	d001      	beq.n	d0 <_debug_putchar+0x1c>
  cc:	2d0a      	cmp	r5, #10
  ce:	d104      	bne.n	da <_debug_putchar+0x26>
                || c == '\n')
#else
	        )
#endif
	{
            buffer_has_room = _debug_printf_flush();
  d0:	f7ff ffc8 	bl	64 <_debug_printf_flush>
	}

	if(buffer_has_room)
  d4:	b2c0      	uxtb	r0, r0
  d6:	2800      	cmp	r0, #0
  d8:	d009      	beq.n	ee <_debug_putchar+0x3a>
	{
	    debug_write_buf[debug_buf_write_index] = c;
  da:	4c05      	ldr	r4, [pc, #20]	(f0 <_debug_putchar+0x3c>)
  dc:	4b06      	ldr	r3, [pc, #24]	(f8 <_debug_putchar+0x44>)
  de:	7820      	ldrb	r0, [r4, #0]
	    debug_buf_write_index =
  e0:	2152      	movs	r1, #82
            buffer_has_room = _debug_printf_flush();
	}

	if(buffer_has_room)
	{
	    debug_write_buf[debug_buf_write_index] = c;
  e2:	541d      	strb	r5, [r3, r0]
	    debug_buf_write_index =
  e4:	3001      	adds	r0, #1
  e6:	f000 f9c0 	bl	46a <__aeabi_idivmod>
  ea:	2001      	movs	r0, #1
  ec:	7021      	strb	r1, [r4, #0]
	            (debug_buf_write_index + 1) % DEBUG_OUTPUT_BUFFER_SIZE;
	    return 1;
	}
	return 0;
}
  ee:	bd70      	pop	{r4, r5, r6, pc}
  f0:	10000000 	.word	0x10000000
  f4:	10000001 	.word	0x10000001
  f8:	10000002 	.word	0x10000002

000000fc <main>:
#include "debug.h"

extern unsigned long _etext;

int main(void)
{
  fc:	b500      	push	{lr}
	//SystemInit(); //!! Note !! Call to SystemInit() is removed from startup code

	//Because this project uses no interrupts, the definition of the exception vector
	//has been reduced to further save FLASH

	debug_printf("Hello World\nSize: %d 0x%X\n", programSize, programSize);
  fe:	4a07      	ldr	r2, [pc, #28]	(11c <main+0x20>)
#include "debug.h"

extern unsigned long _etext;

int main(void)
{
 100:	b083      	sub	sp, #12
	volatile unsigned int i=0;
 102:	2300      	movs	r3, #0
	//SystemInit(); //!! Note !! Call to SystemInit() is removed from startup code

	//Because this project uses no interrupts, the definition of the exception vector
	//has been reduced to further save FLASH

	debug_printf("Hello World\nSize: %d 0x%X\n", programSize, programSize);
 104:	4806      	ldr	r0, [pc, #24]	(120 <main+0x24>)

extern unsigned long _etext;

int main(void)
{
	volatile unsigned int i=0;
 106:	9301      	str	r3, [sp, #4]
	//SystemInit(); //!! Note !! Call to SystemInit() is removed from startup code

	//Because this project uses no interrupts, the definition of the exception vector
	//has been reduced to further save FLASH

	debug_printf("Hello World\nSize: %d 0x%X\n", programSize, programSize);
 108:	1c11      	adds	r1, r2, #0
 10a:	f7ff ff99 	bl	40 <_debug_printf>
	while(1)
	{
		i++;
 10e:	9b01      	ldr	r3, [sp, #4]
		debug_printf("i: %d 0x%X\n", i, i);
 110:	4804      	ldr	r0, [pc, #16]	(124 <main+0x28>)
	//has been reduced to further save FLASH

	debug_printf("Hello World\nSize: %d 0x%X\n", programSize, programSize);
	while(1)
	{
		i++;
 112:	3301      	adds	r3, #1
 114:	9301      	str	r3, [sp, #4]
		debug_printf("i: %d 0x%X\n", i, i);
 116:	9901      	ldr	r1, [sp, #4]
 118:	9a01      	ldr	r2, [sp, #4]
 11a:	e7f6      	b.n	10a <main+0xe>
 11c:	00000b36 	.word	0x00000b36
 120:	00000b08 	.word	0x00000b08
 124:	00000b23 	.word	0x00000b23

00000128 <NMI_Handler>:
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
void NMI_Handler(void)
{
 128:	b500      	push	{lr}
 12a:	e7fe      	b.n	12a <NMI_Handler+0x2>

0000012c <HardFault_Handler>:
// interrupt.  This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void HardFault_Handler(void)
{
 12c:	b500      	push	{lr}
 12e:	e7fe      	b.n	12e <HardFault_Handler+0x2>

00000130 <SVCall_Handler>:
    {
    }
}

void SVCall_Handler(void)
{
 130:	b500      	push	{lr}
 132:	e7fe      	b.n	132 <SVCall_Handler+0x2>

00000134 <PendSV_Handler>:
    {
    }
}

void PendSV_Handler(void)
{
 134:	b500      	push	{lr}
 136:	e7fe      	b.n	136 <PendSV_Handler+0x2>

00000138 <SysTick_Handler>:
    {
    }
}

void SysTick_Handler(void)
{
 138:	b500      	push	{lr}
 13a:	e7fe      	b.n	13a <SysTick_Handler+0x2>

0000013c <ResetISR>:
// resetting the bits in that register) are left solely in the hands of the
// application.
//
//*****************************************************************************
void ResetISR(void)
{
 13c:	b510      	push	{r4, lr}
    unsigned char *pulSrc, *pulDest;

    //
    // Copy the data segment initializers from flash to SRAM.
    //
    pulSrc = (unsigned char *)&_etext;
 13e:	490a      	ldr	r1, [pc, #40]	(168 <ResetISR+0x2c>)
    for(pulDest = (unsigned char *)&_data; pulDest < (unsigned char *)&_edata; )
 140:	4a0a      	ldr	r2, [pc, #40]	(16c <ResetISR+0x30>)
 142:	e003      	b.n	14c <ResetISR+0x10>
    {
        *pulDest++ = *pulSrc++;
 144:	780b      	ldrb	r3, [r1, #0]
 146:	3101      	adds	r1, #1
 148:	7013      	strb	r3, [r2, #0]
 14a:	3201      	adds	r2, #1

    //
    // Copy the data segment initializers from flash to SRAM.
    //
    pulSrc = (unsigned char *)&_etext;
    for(pulDest = (unsigned char *)&_data; pulDest < (unsigned char *)&_edata; )
 14c:	4b08      	ldr	r3, [pc, #32]	(170 <ResetISR+0x34>)
 14e:	429a      	cmp	r2, r3
 150:	d3f8      	bcc.n	144 <ResetISR+0x8>
    }

    //
    // Zero fill the bss segment.
    //
	for(pulDest = (unsigned char *)&_bss; pulDest < (unsigned char *)&_ebss; pulDest++)
 152:	4a08      	ldr	r2, [pc, #32]	(174 <ResetISR+0x38>)
 154:	e002      	b.n	15c <ResetISR+0x20>
	  *pulDest = 0;
 156:	2300      	movs	r3, #0
 158:	7013      	strb	r3, [r2, #0]
    }

    //
    // Zero fill the bss segment.
    //
	for(pulDest = (unsigned char *)&_bss; pulDest < (unsigned char *)&_ebss; pulDest++)
 15a:	3201      	adds	r2, #1
 15c:	4b06      	ldr	r3, [pc, #24]	(178 <ResetISR+0x3c>)
 15e:	429a      	cmp	r2, r3
 160:	d3f9      	bcc.n	156 <ResetISR+0x1a>
	  *pulDest = 0;

	//No need for SystemInit(), etc. Just jump to main
	main();
 162:	f7ff ffcb 	bl	fc <main>
}
 166:	bd10      	pop	{r4, pc}
 168:	00000b36 	.word	0x00000b36
 16c:	10000000 	.word	0x10000000
 170:	10000000 	.word	0x10000000
 174:	10000000 	.word	0x10000000
 178:	10000054 	.word	0x10000054

0000017c <printf_format_nofloat>:
}
#endif

int printf_format(const fp_printf_write_func printf_write,
        	const char *format, va_list varg)
{
 17c:	b5f0      	push	{r4, r5, r6, r7, lr}
 17e:	b089      	sub	sp, #36
 180:	9004      	str	r0, [sp, #16]
 182:	1c0e      	adds	r6, r1, #0
 184:	1c15      	adds	r5, r2, #0
 186:	2700      	movs	r7, #0
 188:	e0b0      	b.n	2ec <printf_format_nofloat+0x170>
    unsigned dec_width = 0 ;
    int pc = 0;
    char scr[2];

        for (; *format != 0; ++format) {
                if (*format == '%') {
 18a:	2b25      	cmp	r3, #37
 18c:	d000      	beq.n	190 <printf_format_nofloat+0x14>
 18e:	e0a8      	b.n	2e2 <printf_format_nofloat+0x166>
                        ++format;
 190:	3601      	adds	r6, #1
                        width = pad = 0;
                        if (*format == '\0')
 192:	7833      	ldrb	r3, [r6, #0]
 194:	2b00      	cmp	r3, #0
 196:	d100      	bne.n	19a <printf_format_nofloat+0x1e>
 198:	e0ac      	b.n	2f4 <printf_format_nofloat+0x178>
                                break;
                        if (*format == '%')
 19a:	2b25      	cmp	r3, #37
 19c:	d100      	bne.n	1a0 <printf_format_nofloat+0x24>
 19e:	e0a0      	b.n	2e2 <printf_format_nofloat+0x166>
                                goto out;
                        if (*format == '-') {
 1a0:	2b2d      	cmp	r3, #45
 1a2:	d001      	beq.n	1a8 <printf_format_nofloat+0x2c>
 1a4:	2200      	movs	r2, #0
 1a6:	e007      	b.n	1b8 <printf_format_nofloat+0x3c>
                                ++format;
 1a8:	2301      	movs	r3, #1
 1aa:	3601      	adds	r6, #1
 1ac:	9305      	str	r3, [sp, #20]
 1ae:	e004      	b.n	1ba <printf_format_nofloat+0x3e>
                                pad = PAD_RIGHT;
                        }
                        while (*format == '0') {
                                ++format;
                                pad |= PAD_ZERO;
 1b0:	9a05      	ldr	r2, [sp, #20]
 1b2:	2302      	movs	r3, #2
                        if (*format == '-') {
                                ++format;
                                pad = PAD_RIGHT;
                        }
                        while (*format == '0') {
                                ++format;
 1b4:	3601      	adds	r6, #1
                                pad |= PAD_ZERO;
 1b6:	431a      	orrs	r2, r3
 1b8:	9205      	str	r2, [sp, #20]
                                goto out;
                        if (*format == '-') {
                                ++format;
                                pad = PAD_RIGHT;
                        }
                        while (*format == '0') {
 1ba:	7833      	ldrb	r3, [r6, #0]
 1bc:	2b30      	cmp	r3, #48
 1be:	d0f7      	beq.n	1b0 <printf_format_nofloat+0x34>
                                ++format;
                                pad |= PAD_ZERO;
                        }
         post_decimal = 0 ;
         if (*format == '.'  || *format == '*'
 1c0:	2b2e      	cmp	r3, #46
 1c2:	d005      	beq.n	1d0 <printf_format_nofloat+0x54>
 1c4:	2b2a      	cmp	r3, #42
 1c6:	d003      	beq.n	1d0 <printf_format_nofloat+0x54>
 1c8:	3b30      	subs	r3, #48
 1ca:	b2db      	uxtb	r3, r3
 1cc:	2b09      	cmp	r3, #9
 1ce:	d81a      	bhi.n	206 <printf_format_nofloat+0x8a>
 1d0:	1c31      	adds	r1, r6, #0
 1d2:	2400      	movs	r4, #0
 1d4:	2200      	movs	r2, #0
 1d6:	e001      	b.n	1dc <printf_format_nofloat+0x60>
 1d8:	2401      	movs	r4, #1
 1da:	3101      	adds	r1, #1
         || (*format >= '0' &&  *format <= '9')) {

            while (1) {
                if (*format == '*') {
 1dc:	780b      	ldrb	r3, [r1, #0]
                        while (*format == '0') {
                                ++format;
                                pad |= PAD_ZERO;
                        }
         post_decimal = 0 ;
         if (*format == '.'  || *format == '*'
 1de:	1c0e      	adds	r6, r1, #0
         || (*format >= '0' &&  *format <= '9')) {

            while (1) {
                if (*format == '*') {
 1e0:	2b2a      	cmp	r3, #42
 1e2:	d102      	bne.n	1ea <printf_format_nofloat+0x6e>
                   width = va_arg(varg, int);
 1e4:	682a      	ldr	r2, [r5, #0]
 1e6:	3504      	adds	r5, #4
 1e8:	e7f7      	b.n	1da <printf_format_nofloat+0x5e>
                   format++;
               } else if (*format == '.') {
 1ea:	2b2e      	cmp	r3, #46
 1ec:	d0f4      	beq.n	1d8 <printf_format_nofloat+0x5c>
                  post_decimal = 1 ;
                  dec_width = 0 ;
                  format++ ;
               } else if ((*format >= '0' &&  *format <= '9')) {
 1ee:	1c18      	adds	r0, r3, #0
 1f0:	3830      	subs	r0, #48
 1f2:	b2c3      	uxtb	r3, r0
 1f4:	2b09      	cmp	r3, #9
 1f6:	d807      	bhi.n	208 <printf_format_nofloat+0x8c>
                  if (post_decimal) {
 1f8:	2c00      	cmp	r4, #0
 1fa:	d1ee      	bne.n	1da <printf_format_nofloat+0x5e>
                     dec_width *= 10;
                     dec_width += *format - '0';
                  } else {
                     width *= 10;
 1fc:	0093      	lsls	r3, r2, #2
 1fe:	189b      	adds	r3, r3, r2
 200:	005b      	lsls	r3, r3, #1
                     width += *format - '0';
 202:	18c2      	adds	r2, r0, r3
 204:	e7e9      	b.n	1da <printf_format_nofloat+0x5e>
 206:	2200      	movs	r2, #0
               } else {
                  break;
               }
            }
         }
         if (*format == 'l')
 208:	7833      	ldrb	r3, [r6, #0]
 20a:	2b6c      	cmp	r3, #108
 20c:	d100      	bne.n	210 <printf_format_nofloat+0x94>
            ++format;
 20e:	3601      	adds	r6, #1
         switch (*format) {
 210:	7833      	ldrb	r3, [r6, #0]
 212:	2b70      	cmp	r3, #112
 214:	d030      	beq.n	278 <printf_format_nofloat+0xfc>
 216:	2b70      	cmp	r3, #112
 218:	d806      	bhi.n	228 <printf_format_nofloat+0xac>
 21a:	2b63      	cmp	r3, #99
 21c:	d04c      	beq.n	2b8 <printf_format_nofloat+0x13c>
 21e:	2b64      	cmp	r3, #100
 220:	d013      	beq.n	24a <printf_format_nofloat+0xce>
 222:	2b58      	cmp	r3, #88
 224:	d156      	bne.n	2d4 <printf_format_nofloat+0x158>
 226:	e022      	b.n	26e <printf_format_nofloat+0xf2>
 228:	2b75      	cmp	r3, #117
 22a:	d038      	beq.n	29e <printf_format_nofloat+0x122>
 22c:	2b78      	cmp	r3, #120
 22e:	d017      	beq.n	260 <printf_format_nofloat+0xe4>
 230:	2b73      	cmp	r3, #115
 232:	d14f      	bne.n	2d4 <printf_format_nofloat+0x158>
         case 's':
            {
            char *s = (char *) va_arg(varg, char *);   //lint !e740
 234:	6829      	ldr	r1, [r5, #0]
            // printf("[%s] w=%u\n", s, width) ;
            pc += prints (printf_write, s ? s : "(null)", width, pad);
 236:	2900      	cmp	r1, #0
 238:	d100      	bne.n	23c <printf_format_nofloat+0xc0>
 23a:	4930      	ldr	r1, [pc, #192]	(2fc <printf_format_nofloat+0x180>)
 23c:	9804      	ldr	r0, [sp, #16]
 23e:	9b05      	ldr	r3, [sp, #20]
 240:	f000 f85e 	bl	300 <prints>
         if (*format == 'l')
            ++format;
         switch (*format) {
         case 's':
            {
            char *s = (char *) va_arg(varg, char *);   //lint !e740
 244:	3504      	adds	r5, #4
            // printf("[%s] w=%u\n", s, width) ;
            pc += prints (printf_write, s ? s : "(null)", width, pad);
 246:	183f      	adds	r7, r7, r0
 248:	e04f      	b.n	2ea <printf_format_nofloat+0x16e>
            }
            break;
         case 'd':
            pc += printi (printf_write, va_arg(varg, int), 10, 1, width, pad, 'a');
 24a:	9b05      	ldr	r3, [sp, #20]
 24c:	6829      	ldr	r1, [r5, #0]
 24e:	9301      	str	r3, [sp, #4]
 250:	2361      	movs	r3, #97
 252:	9200      	str	r2, [sp, #0]
 254:	9302      	str	r3, [sp, #8]
 256:	1d2c      	adds	r4, r5, #4
 258:	9804      	ldr	r0, [sp, #16]
 25a:	220a      	movs	r2, #10
 25c:	2301      	movs	r3, #1
 25e:	e028      	b.n	2b2 <printf_format_nofloat+0x136>
            break;
         case 'x':
            pc += printi (printf_write, va_arg(varg, int), 16, 0, width, pad, 'a');
 260:	6829      	ldr	r1, [r5, #0]
 262:	9200      	str	r2, [sp, #0]
 264:	9a05      	ldr	r2, [sp, #20]
 266:	1d2c      	adds	r4, r5, #4
 268:	9201      	str	r2, [sp, #4]
 26a:	2361      	movs	r3, #97
 26c:	e013      	b.n	296 <printf_format_nofloat+0x11a>
            break;
         case 'X':
            pc += printi (printf_write, va_arg(varg, int), 16, 0, width, pad, 'A');
 26e:	6829      	ldr	r1, [r5, #0]
 270:	1d2c      	adds	r4, r5, #4
 272:	9200      	str	r2, [sp, #0]
 274:	9b05      	ldr	r3, [sp, #20]
 276:	e00c      	b.n	292 <printf_format_nofloat+0x116>
            break;
         case 'p':
            printf_write('0');
 278:	9a04      	ldr	r2, [sp, #16]
 27a:	2030      	movs	r0, #48
 27c:	4790      	blx	r2
            printf_write('x');
 27e:	9b04      	ldr	r3, [sp, #16]
 280:	2078      	movs	r0, #120
 282:	4798      	blx	r3
            pad |= PAD_ZERO;
            width = 8;
            pc += printi (printf_write, va_arg(varg, int), 16, 0, width, pad, 'A');
 284:	2308      	movs	r3, #8
 286:	9a05      	ldr	r2, [sp, #20]
 288:	6829      	ldr	r1, [r5, #0]
 28a:	9300      	str	r3, [sp, #0]
 28c:	2302      	movs	r3, #2
 28e:	1d2c      	adds	r4, r5, #4
 290:	4313      	orrs	r3, r2
 292:	9301      	str	r3, [sp, #4]
 294:	2341      	movs	r3, #65
 296:	9302      	str	r3, [sp, #8]
 298:	9804      	ldr	r0, [sp, #16]
 29a:	2210      	movs	r2, #16
 29c:	e008      	b.n	2b0 <printf_format_nofloat+0x134>
            break;
         case 'u':
            pc += printi (printf_write, va_arg(varg, int), 10, 0, width, pad, 'a');
 29e:	9b05      	ldr	r3, [sp, #20]
 2a0:	6829      	ldr	r1, [r5, #0]
 2a2:	9804      	ldr	r0, [sp, #16]
 2a4:	9301      	str	r3, [sp, #4]
 2a6:	2361      	movs	r3, #97
 2a8:	9200      	str	r2, [sp, #0]
 2aa:	1d2c      	adds	r4, r5, #4
 2ac:	9302      	str	r3, [sp, #8]
 2ae:	220a      	movs	r2, #10
 2b0:	2300      	movs	r3, #0
 2b2:	f000 f85d 	bl	370 <printi>
 2b6:	e00a      	b.n	2ce <printf_format_nofloat+0x152>
            break;
         case 'c':
            /* char are converted to int then pushed on the stack */
            scr[0] = (char)va_arg(varg, int);
 2b8:	682b      	ldr	r3, [r5, #0]
 2ba:	4669      	mov	r1, sp
 2bc:	311e      	adds	r1, #30
 2be:	700b      	strb	r3, [r1, #0]
            scr[1] = '\0';
 2c0:	2300      	movs	r3, #0
 2c2:	704b      	strb	r3, [r1, #1]
            pc += prints (printf_write, scr, width, pad);
 2c4:	9804      	ldr	r0, [sp, #16]
 2c6:	9b05      	ldr	r3, [sp, #20]
         case 'u':
            pc += printi (printf_write, va_arg(varg, int), 10, 0, width, pad, 'a');
            break;
         case 'c':
            /* char are converted to int then pushed on the stack */
            scr[0] = (char)va_arg(varg, int);
 2c8:	1d2c      	adds	r4, r5, #4
            scr[1] = '\0';
            pc += prints (printf_write, scr, width, pad);
 2ca:	f000 f819 	bl	300 <prints>
 2ce:	183f      	adds	r7, r7, r0
 2d0:	1c25      	adds	r5, r4, #0
 2d2:	e00a      	b.n	2ea <printf_format_nofloat+0x16e>
            }
            break;
#endif

         default:
        	 printf_write('%');
 2d4:	9a04      	ldr	r2, [sp, #16]
 2d6:	2025      	movs	r0, #37
 2d8:	4790      	blx	r2
        	 printf_write(*format);
 2da:	7830      	ldrb	r0, [r6, #0]
 2dc:	9b04      	ldr	r3, [sp, #16]
 2de:	4798      	blx	r3
 2e0:	e003      	b.n	2ea <printf_format_nofloat+0x16e>
            break;
         }
                }
                else {
                 out:
                 printf_write(*format);
 2e2:	7830      	ldrb	r0, [r6, #0]
 2e4:	9a04      	ldr	r2, [sp, #16]
 2e6:	4790      	blx	r2
                        ++pc;
 2e8:	3701      	adds	r7, #1
    int width, pad ;
    unsigned dec_width = 0 ;
    int pc = 0;
    char scr[2];

        for (; *format != 0; ++format) {
 2ea:	3601      	adds	r6, #1
 2ec:	7833      	ldrb	r3, [r6, #0]
 2ee:	2b00      	cmp	r3, #0
 2f0:	d000      	beq.n	2f4 <printf_format_nofloat+0x178>
 2f2:	e74a      	b.n	18a <printf_format_nofloat+0xe>
                 printf_write(*format);
                        ++pc;
                }
        }
        return pc;
}
 2f4:	b009      	add	sp, #36
 2f6:	1c38      	adds	r0, r7, #0
 2f8:	bdf0      	pop	{r4, r5, r6, r7, pc}
 2fa:	46c0      	nop			(mov r8, r8)
 2fc:	00000b2f 	.word	0x00000b2f

00000300 <prints>:

#define PAD_RIGHT 1
#define PAD_ZERO 2

int prints(const fp_printf_write_func printf_write, const char *string, int width, int pad)
{
 300:	b5f0      	push	{r4, r5, r6, r7, lr}
 302:	b083      	sub	sp, #12
 304:	1c0f      	adds	r7, r1, #0
 306:	9001      	str	r0, [sp, #4]
 308:	1c15      	adds	r5, r2, #0
 30a:	1c19      	adds	r1, r3, #0
    register int pc = 0, padchar = ' ';

    if (width > 0) {
 30c:	2a00      	cmp	r2, #0
 30e:	dd0e      	ble.n	32e <prints+0x2e>
 310:	2200      	movs	r2, #0
 312:	e000      	b.n	316 <prints+0x16>
        register int len = 0;
        register const char *ptr;
        for (ptr = string; *ptr; ++ptr) ++len;
 314:	3201      	adds	r2, #1
 316:	5cbb      	ldrb	r3, [r7, r2]
 318:	2b00      	cmp	r3, #0
 31a:	d1fb      	bne.n	314 <prints+0x14>
        if (len >= width) width = 0;
 31c:	42aa      	cmp	r2, r5
 31e:	db01      	blt.n	324 <prints+0x24>
 320:	2500      	movs	r5, #0
 322:	e000      	b.n	326 <prints+0x26>
        else width -= len;
 324:	1aad      	subs	r5, r5, r2
        if (pad & PAD_ZERO) padchar = '0';
 326:	078b      	lsls	r3, r1, #30
 328:	d501      	bpl.n	32e <prints+0x2e>
 32a:	2630      	movs	r6, #48
 32c:	e000      	b.n	330 <prints+0x30>
 32e:	2620      	movs	r6, #32
    }
    if (!(pad & PAD_RIGHT)) {
 330:	07cb      	lsls	r3, r1, #31
 332:	d501      	bpl.n	338 <prints+0x38>
 334:	2400      	movs	r4, #0
 336:	e00d      	b.n	354 <prints+0x54>
 338:	2400      	movs	r4, #0
 33a:	e004      	b.n	346 <prints+0x46>
        for ( ; width > 0; --width) {
            printf_write(padchar);
 33c:	b2f0      	uxtb	r0, r6
 33e:	9b01      	ldr	r3, [sp, #4]
 340:	4798      	blx	r3
                ++pc;
 342:	3401      	adds	r4, #1
        if (len >= width) width = 0;
        else width -= len;
        if (pad & PAD_ZERO) padchar = '0';
    }
    if (!(pad & PAD_RIGHT)) {
        for ( ; width > 0; --width) {
 344:	3d01      	subs	r5, #1
 346:	2d00      	cmp	r5, #0
 348:	dcf8      	bgt.n	33c <prints+0x3c>
 34a:	e003      	b.n	354 <prints+0x54>
            printf_write(padchar);
                ++pc;
        }
    }
    for ( ; *string ; ++string) {
        printf_write(*string);
 34c:	9b01      	ldr	r3, [sp, #4]
 34e:	4798      	blx	r3
            ++pc;
 350:	3401      	adds	r4, #1
        for ( ; width > 0; --width) {
            printf_write(padchar);
                ++pc;
        }
    }
    for ( ; *string ; ++string) {
 352:	3701      	adds	r7, #1
 354:	7838      	ldrb	r0, [r7, #0]
 356:	2800      	cmp	r0, #0
 358:	d1f8      	bne.n	34c <prints+0x4c>
 35a:	e004      	b.n	366 <prints+0x66>
        printf_write(*string);
            ++pc;
    }
    for ( ; width > 0; --width) {
        printf_write(padchar);
 35c:	b2f0      	uxtb	r0, r6
 35e:	9b01      	ldr	r3, [sp, #4]
 360:	4798      	blx	r3
            ++pc;
 362:	3401      	adds	r4, #1
    }
    for ( ; *string ; ++string) {
        printf_write(*string);
            ++pc;
    }
    for ( ; width > 0; --width) {
 364:	3d01      	subs	r5, #1
 366:	2d00      	cmp	r5, #0
 368:	dcf8      	bgt.n	35c <prints+0x5c>
        printf_write(padchar);
            ++pc;
    }

    return pc;
}
 36a:	b003      	add	sp, #12
 36c:	1c20      	adds	r0, r4, #0
 36e:	bdf0      	pop	{r4, r5, r6, r7, pc}

00000370 <printi>:

/* the following should be enough for 32 bit int */
#define PRINT_BUF_LEN 12

int printi(const fp_printf_write_func printf_write, int i, int b, int sg, int width, int pad, int letbase)
{
 370:	b5f0      	push	{r4, r5, r6, r7, lr}
 372:	b087      	sub	sp, #28
 374:	9000      	str	r0, [sp, #0]
 376:	1c16      	adds	r6, r2, #0
 378:	1c08      	adds	r0, r1, #0
 37a:	9f0c      	ldr	r7, [sp, #48]
    char print_buf[PRINT_BUF_LEN];
    register char *s;
    register int t, neg = 0, pc = 0;
    register unsigned int u = i;
 37c:	1c0c      	adds	r4, r1, #0

    if (i == 0) {
 37e:	2900      	cmp	r1, #0
 380:	d109      	bne.n	396 <printi+0x26>
        print_buf[0] = '0';
 382:	a903      	add	r1, sp, #12
 384:	2330      	movs	r3, #48
 386:	700b      	strb	r3, [r1, #0]
        print_buf[1] = '\0';
 388:	7048      	strb	r0, [r1, #1]
        return prints(printf_write, print_buf, width, pad);
 38a:	9800      	ldr	r0, [sp, #0]
 38c:	1c3a      	adds	r2, r7, #0
 38e:	9b0d      	ldr	r3, [sp, #52]
 390:	f7ff ffb6 	bl	300 <prints>
 394:	e03e      	b.n	414 <printi+0xa4>
    }

    if (sg && b == 10 && i < 0) {
 396:	2b00      	cmp	r3, #0
 398:	d007      	beq.n	3aa <printi+0x3a>
 39a:	2a0a      	cmp	r2, #10
 39c:	d105      	bne.n	3aa <printi+0x3a>
 39e:	2900      	cmp	r1, #0
 3a0:	da03      	bge.n	3aa <printi+0x3a>
        neg = 1;
        u = -i;
 3a2:	2201      	movs	r2, #1
 3a4:	424c      	negs	r4, r1
 3a6:	9201      	str	r2, [sp, #4]
 3a8:	e001      	b.n	3ae <printi+0x3e>
 3aa:	2300      	movs	r3, #0
 3ac:	9301      	str	r3, [sp, #4]
    }

    s = print_buf + PRINT_BUF_LEN-1;
    *s = '\0';
 3ae:	2200      	movs	r2, #0
 3b0:	ab03      	add	r3, sp, #12
 3b2:	466d      	mov	r5, sp
 3b4:	72da      	strb	r2, [r3, #11]
 3b6:	3517      	adds	r5, #23
 3b8:	e011      	b.n	3de <printi+0x6e>

    while (u) {
        t = u % b;
 3ba:	1c20      	adds	r0, r4, #0
 3bc:	1c31      	adds	r1, r6, #0
 3be:	f000 f85b 	bl	478 <__aeabi_uidivmod>
        if( t >= 10 )
 3c2:	2909      	cmp	r1, #9
 3c4:	dd02      	ble.n	3cc <printi+0x5c>
            t += letbase - '0' - 10;
 3c6:	9b0e      	ldr	r3, [sp, #56]
 3c8:	3b3a      	subs	r3, #58
 3ca:	18c9      	adds	r1, r1, r3
        *--s = t + '0';
 3cc:	1c0b      	adds	r3, r1, #0
 3ce:	3330      	adds	r3, #48
        u /= b;
 3d0:	1c20      	adds	r0, r4, #0

    while (u) {
        t = u % b;
        if( t >= 10 )
            t += letbase - '0' - 10;
        *--s = t + '0';
 3d2:	3d01      	subs	r5, #1
        u /= b;
 3d4:	1c31      	adds	r1, r6, #0

    while (u) {
        t = u % b;
        if( t >= 10 )
            t += letbase - '0' - 10;
        *--s = t + '0';
 3d6:	702b      	strb	r3, [r5, #0]
        u /= b;
 3d8:	f000 f8b8 	bl	54c <__aeabi_uidiv>
 3dc:	1c04      	adds	r4, r0, #0
    }

    s = print_buf + PRINT_BUF_LEN-1;
    *s = '\0';

    while (u) {
 3de:	2c00      	cmp	r4, #0
 3e0:	d1eb      	bne.n	3ba <printi+0x4a>
            t += letbase - '0' - 10;
        *--s = t + '0';
        u /= b;
    }

    if (neg) {
 3e2:	9a01      	ldr	r2, [sp, #4]
 3e4:	2a00      	cmp	r2, #0
 3e6:	d00e      	beq.n	406 <printi+0x96>
        if( width && (pad & PAD_ZERO) ) {
 3e8:	2f00      	cmp	r7, #0
 3ea:	d008      	beq.n	3fe <printi+0x8e>
 3ec:	9b0d      	ldr	r3, [sp, #52]
 3ee:	079b      	lsls	r3, r3, #30
 3f0:	d505      	bpl.n	3fe <printi+0x8e>
            printf_write('-');
 3f2:	202d      	movs	r0, #45
 3f4:	9a00      	ldr	r2, [sp, #0]
 3f6:	4790      	blx	r2
            ++pc;
            --width;
 3f8:	3f01      	subs	r7, #1
 3fa:	2401      	movs	r4, #1
 3fc:	e003      	b.n	406 <printi+0x96>
        }
        else {
            *--s = '-';
 3fe:	3d01      	subs	r5, #1
 400:	232d      	movs	r3, #45
 402:	702b      	strb	r3, [r5, #0]
 404:	2400      	movs	r4, #0
        }
    }

    return pc + prints (printf_write, s, width, pad);
 406:	9800      	ldr	r0, [sp, #0]
 408:	1c29      	adds	r1, r5, #0
 40a:	1c3a      	adds	r2, r7, #0
 40c:	9b0d      	ldr	r3, [sp, #52]
 40e:	f7ff ff77 	bl	300 <prints>
 412:	1900      	adds	r0, r0, r4
}
 414:	b007      	add	sp, #28
 416:	bdf0      	pop	{r4, r5, r6, r7, pc}

00000418 <__write>:
 418:	b570      	push	{r4, r5, r6, lr}
 41a:	1c0e      	adds	r6, r1, #0
 41c:	1c15      	adds	r5, r2, #0
 41e:	1c04      	adds	r4, r0, #0
 420:	2005      	movs	r0, #5
 422:	b420      	push	{r5}
 424:	b440      	push	{r6}
 426:	b410      	push	{r4}
 428:	4669      	mov	r1, sp
 42a:	beab      	bkpt	0x00ab
 42c:	1c04      	adds	r4, r0, #0
 42e:	b003      	add	sp, #12
 430:	1c20      	adds	r0, r4, #0
 432:	bd70      	pop	{r4, r5, r6, pc}

00000434 <__ARM_switch8>:
 434:	4778      	bx	pc
 436:	bf00      	nop

00000438 <xxx>:
 438:	e55ec001 	ldrb	ip, [lr, #-1]
 43c:	e153000c 	cmp	r3, ip
 440:	37dec003 	ldrbcc	ip, [lr, r3]
 444:	27dec00c 	ldrbcs	ip, [lr, ip]
 448:	e08ec08c 	add	ip, lr, ip, lsl #1
 44c:	e12fff1c 	bx	ip

00000450 <__ARM_call_via_r0>:
 450:	4700      	bx	r0

00000452 <__ARM_call_via_r1>:
 452:	4708      	bx	r1

00000454 <__ARM_call_via_r2>:
 454:	4710      	bx	r2

00000456 <__ARM_call_via_r3>:
 456:	4718      	bx	r3

00000458 <__ARM_call_via_r4>:
 458:	4720      	bx	r4

0000045a <__ARM_call_via_r5>:
 45a:	4728      	bx	r5

0000045c <__ARM_call_via_r6>:
 45c:	4730      	bx	r6

0000045e <__ARM_call_via_r7>:
 45e:	4738      	bx	r7

00000460 <__ARM_call_via_r8>:
 460:	4740      	bx	r8

00000462 <__ARM_call_via_r9>:
 462:	4748      	bx	r9

00000464 <__ARM_call_via_r10>:
 464:	4750      	bx	sl

00000466 <__ARM_call_via_r11>:
 466:	4758      	bx	fp

00000468 <__ARM_call_via_r12>:
 468:	4760      	bx	ip

0000046a <__aeabi_idivmod>:
 46a:	b503      	push	{r0, r1, lr}
 46c:	460a      	mov	r2, r1
 46e:	4601      	mov	r1, r0
 470:	4668      	mov	r0, sp
 472:	f000 f8a5 	bl	5c0 <__bhs_idivmod>
 476:	bd03      	pop	{r0, r1, pc}

00000478 <__aeabi_uidivmod>:
 478:	b503      	push	{r0, r1, lr}
 47a:	460a      	mov	r2, r1
 47c:	4601      	mov	r1, r0
 47e:	4668      	mov	r0, sp
 480:	f000 f81e 	bl	4c0 <__bhs_uidivmod>
 484:	bd03      	pop	{r0, r1, pc}

00000486 <__aeabi_ldivmod>:
 486:	b500      	push	{lr}
 488:	b085      	sub	sp, #20
 48a:	b40c      	push	{r2, r3}
 48c:	4602      	mov	r2, r0
 48e:	460b      	mov	r3, r1
 490:	a802      	add	r0, sp, #8
 492:	f000 f9ff 	bl	894 <__bhs_ldivmod>
 496:	b002      	add	sp, #8
 498:	9805      	ldr	r0, [sp, #20]
 49a:	4684      	mov	ip, r0
 49c:	bc0f      	pop	{r0, r1, r2, r3}
 49e:	bd00      	pop	{pc}

000004a0 <__aeabi_uldivmod>:
 4a0:	b500      	push	{lr}
 4a2:	b085      	sub	sp, #20
 4a4:	b40c      	push	{r2, r3}
 4a6:	4602      	mov	r2, r0
 4a8:	460b      	mov	r3, r1
 4aa:	a802      	add	r0, sp, #8
 4ac:	f000 f8e4 	bl	678 <__bhs_uldivmod>
 4b0:	b002      	add	sp, #8
 4b2:	9805      	ldr	r0, [sp, #20]
 4b4:	4684      	mov	ip, r0
 4b6:	bc0f      	pop	{r0, r1, r2, r3}
 4b8:	bd00      	pop	{pc}
 4ba:	46c0      	nop			(mov r8, r8)

000004bc <__aeabi_idiv0>:
 4bc:	4770      	bx	lr
 4be:	46c0      	nop			(mov r8, r8)

000004c0 <__bhs_uidivmod>:
 4c0:	b5f0      	push	{r4, r5, r6, r7, lr}
 4c2:	4647      	mov	r7, r8
 4c4:	b480      	push	{r7}
 4c6:	1c05      	adds	r5, r0, #0
 4c8:	1c14      	adds	r4, r2, #0
 4ca:	2a00      	cmp	r2, #0
 4cc:	d034      	beq.n	538 <__bhs_uidivmod+0x78>
 4ce:	090b      	lsrs	r3, r1, #4
 4d0:	429a      	cmp	r2, r3
 4d2:	d837      	bhi.n	544 <__bhs_uidivmod+0x84>
 4d4:	2001      	movs	r0, #1
 4d6:	0124      	lsls	r4, r4, #4
 4d8:	3001      	adds	r0, #1
 4da:	429c      	cmp	r4, r3
 4dc:	d9fb      	bls.n	4d6 <__bhs_uidivmod+0x16>
 4de:	2308      	movs	r3, #8
 4e0:	4698      	mov	r8, r3
 4e2:	2304      	movs	r3, #4
 4e4:	2200      	movs	r2, #0
 4e6:	469c      	mov	ip, r3
 4e8:	2702      	movs	r7, #2
 4ea:	2601      	movs	r6, #1
 4ec:	e000      	b.n	4f0 <__bhs_uidivmod+0x30>
 4ee:	0924      	lsrs	r4, r4, #4
 4f0:	08cb      	lsrs	r3, r1, #3
 4f2:	0112      	lsls	r2, r2, #4
 4f4:	429c      	cmp	r4, r3
 4f6:	d803      	bhi.n	500 <__bhs_uidivmod+0x40>
 4f8:	00e3      	lsls	r3, r4, #3
 4fa:	1ac9      	subs	r1, r1, r3
 4fc:	4643      	mov	r3, r8
 4fe:	431a      	orrs	r2, r3
 500:	088b      	lsrs	r3, r1, #2
 502:	429c      	cmp	r4, r3
 504:	d803      	bhi.n	50e <__bhs_uidivmod+0x4e>
 506:	00a3      	lsls	r3, r4, #2
 508:	1ac9      	subs	r1, r1, r3
 50a:	4663      	mov	r3, ip
 50c:	431a      	orrs	r2, r3
 50e:	084b      	lsrs	r3, r1, #1
 510:	429c      	cmp	r4, r3
 512:	d802      	bhi.n	51a <__bhs_uidivmod+0x5a>
 514:	0063      	lsls	r3, r4, #1
 516:	1ac9      	subs	r1, r1, r3
 518:	433a      	orrs	r2, r7
 51a:	42a1      	cmp	r1, r4
 51c:	d301      	bcc.n	522 <__bhs_uidivmod+0x62>
 51e:	1b09      	subs	r1, r1, r4
 520:	4332      	orrs	r2, r6
 522:	3801      	subs	r0, #1
 524:	2800      	cmp	r0, #0
 526:	d1e2      	bne.n	4ee <__bhs_uidivmod+0x2e>
 528:	6069      	str	r1, [r5, #4]
 52a:	602a      	str	r2, [r5, #0]
 52c:	1c28      	adds	r0, r5, #0
 52e:	bc04      	pop	{r2}
 530:	4690      	mov	r8, r2
 532:	bcf0      	pop	{r4, r5, r6, r7}
 534:	bc02      	pop	{r1}
 536:	4708      	bx	r1
 538:	2000      	movs	r0, #0
 53a:	f7ff ffbf 	bl	4bc <__aeabi_idiv0>
 53e:	606c      	str	r4, [r5, #4]
 540:	6028      	str	r0, [r5, #0]
 542:	e7f3      	b.n	52c <__bhs_uidivmod+0x6c>
 544:	2001      	movs	r0, #1
 546:	e7ca      	b.n	4de <__bhs_uidivmod+0x1e>

00000548 <__aeabi_ldiv0>:
 548:	4770      	bx	lr
 54a:	46c0      	nop			(mov r8, r8)

0000054c <__aeabi_uidiv>:
 54c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 54e:	2900      	cmp	r1, #0
 550:	d02e      	beq.n	5b0 <__aeabi_uidiv+0x64>
 552:	0903      	lsrs	r3, r0, #4
 554:	4299      	cmp	r1, r3
 556:	d830      	bhi.n	5ba <__aeabi_uidiv+0x6e>
 558:	2401      	movs	r4, #1
 55a:	0109      	lsls	r1, r1, #4
 55c:	3401      	adds	r4, #1
 55e:	4299      	cmp	r1, r3
 560:	d9fb      	bls.n	55a <__aeabi_uidiv+0xe>
 562:	2308      	movs	r3, #8
 564:	2200      	movs	r2, #0
 566:	469c      	mov	ip, r3
 568:	2704      	movs	r7, #4
 56a:	2602      	movs	r6, #2
 56c:	2501      	movs	r5, #1
 56e:	e000      	b.n	572 <__aeabi_uidiv+0x26>
 570:	0909      	lsrs	r1, r1, #4
 572:	08c3      	lsrs	r3, r0, #3
 574:	0112      	lsls	r2, r2, #4
 576:	428b      	cmp	r3, r1
 578:	d303      	bcc.n	582 <__aeabi_uidiv+0x36>
 57a:	00cb      	lsls	r3, r1, #3
 57c:	1ac0      	subs	r0, r0, r3
 57e:	4663      	mov	r3, ip
 580:	431a      	orrs	r2, r3
 582:	0883      	lsrs	r3, r0, #2
 584:	4299      	cmp	r1, r3
 586:	d802      	bhi.n	58e <__aeabi_uidiv+0x42>
 588:	008b      	lsls	r3, r1, #2
 58a:	1ac0      	subs	r0, r0, r3
 58c:	433a      	orrs	r2, r7
 58e:	0843      	lsrs	r3, r0, #1
 590:	4299      	cmp	r1, r3
 592:	d802      	bhi.n	59a <__aeabi_uidiv+0x4e>
 594:	004b      	lsls	r3, r1, #1
 596:	1ac0      	subs	r0, r0, r3
 598:	4332      	orrs	r2, r6
 59a:	4281      	cmp	r1, r0
 59c:	d801      	bhi.n	5a2 <__aeabi_uidiv+0x56>
 59e:	1a40      	subs	r0, r0, r1
 5a0:	432a      	orrs	r2, r5
 5a2:	3c01      	subs	r4, #1
 5a4:	2c00      	cmp	r4, #0
 5a6:	d1e3      	bne.n	570 <__aeabi_uidiv+0x24>
 5a8:	1c10      	adds	r0, r2, #0
 5aa:	bcf8      	pop	{r3, r4, r5, r6, r7}
 5ac:	bc02      	pop	{r1}
 5ae:	4708      	bx	r1
 5b0:	2000      	movs	r0, #0
 5b2:	f7ff ff83 	bl	4bc <__aeabi_idiv0>
 5b6:	1c02      	adds	r2, r0, #0
 5b8:	e7f6      	b.n	5a8 <__aeabi_uidiv+0x5c>
 5ba:	2401      	movs	r4, #1
 5bc:	e7d1      	b.n	562 <__aeabi_uidiv+0x16>
 5be:	46c0      	nop			(mov r8, r8)

000005c0 <__bhs_idivmod>:
 5c0:	b5f0      	push	{r4, r5, r6, r7, lr}
 5c2:	4657      	mov	r7, sl
 5c4:	464e      	mov	r6, r9
 5c6:	4645      	mov	r5, r8
 5c8:	b4e0      	push	{r5, r6, r7}
 5ca:	1c0d      	adds	r5, r1, #0
 5cc:	17d1      	asrs	r1, r2, #31
 5ce:	4692      	mov	sl, r2
 5d0:	1852      	adds	r2, r2, r1
 5d2:	404a      	eors	r2, r1
 5d4:	1c06      	adds	r6, r0, #0
 5d6:	2a00      	cmp	r2, #0
 5d8:	d047      	beq.n	66a <__bhs_idivmod+0xaa>
 5da:	17eb      	asrs	r3, r5, #31
 5dc:	18e9      	adds	r1, r5, r3
 5de:	4059      	eors	r1, r3
 5e0:	090b      	lsrs	r3, r1, #4
 5e2:	429a      	cmp	r2, r3
 5e4:	d846      	bhi.n	674 <__bhs_idivmod+0xb4>
 5e6:	2401      	movs	r4, #1
 5e8:	0112      	lsls	r2, r2, #4
 5ea:	3401      	adds	r4, #1
 5ec:	429a      	cmp	r2, r3
 5ee:	d9fb      	bls.n	5e8 <__bhs_idivmod+0x28>
 5f0:	2308      	movs	r3, #8
 5f2:	4699      	mov	r9, r3
 5f4:	2304      	movs	r3, #4
 5f6:	4698      	mov	r8, r3
 5f8:	2302      	movs	r3, #2
 5fa:	2000      	movs	r0, #0
 5fc:	469c      	mov	ip, r3
 5fe:	2701      	movs	r7, #1
 600:	e000      	b.n	604 <__bhs_idivmod+0x44>
 602:	0912      	lsrs	r2, r2, #4
 604:	08cb      	lsrs	r3, r1, #3
 606:	0100      	lsls	r0, r0, #4
 608:	4293      	cmp	r3, r2
 60a:	d303      	bcc.n	614 <__bhs_idivmod+0x54>
 60c:	00d3      	lsls	r3, r2, #3
 60e:	1ac9      	subs	r1, r1, r3
 610:	464b      	mov	r3, r9
 612:	4318      	orrs	r0, r3
 614:	088b      	lsrs	r3, r1, #2
 616:	429a      	cmp	r2, r3
 618:	d803      	bhi.n	622 <__bhs_idivmod+0x62>
 61a:	0093      	lsls	r3, r2, #2
 61c:	1ac9      	subs	r1, r1, r3
 61e:	4643      	mov	r3, r8
 620:	4318      	orrs	r0, r3
 622:	084b      	lsrs	r3, r1, #1
 624:	429a      	cmp	r2, r3
 626:	d803      	bhi.n	630 <__bhs_idivmod+0x70>
 628:	0053      	lsls	r3, r2, #1
 62a:	1ac9      	subs	r1, r1, r3
 62c:	4663      	mov	r3, ip
 62e:	4318      	orrs	r0, r3
 630:	428a      	cmp	r2, r1
 632:	d801      	bhi.n	638 <__bhs_idivmod+0x78>
 634:	1a89      	subs	r1, r1, r2
 636:	4338      	orrs	r0, r7
 638:	3c01      	subs	r4, #1
 63a:	2c00      	cmp	r4, #0
 63c:	d1e1      	bne.n	602 <__bhs_idivmod+0x42>
 63e:	4653      	mov	r3, sl
 640:	406b      	eors	r3, r5
 642:	2b00      	cmp	r3, #0
 644:	db0c      	blt.n	660 <__bhs_idivmod+0xa0>
 646:	2d00      	cmp	r5, #0
 648:	db0d      	blt.n	666 <__bhs_idivmod+0xa6>
 64a:	1c0b      	adds	r3, r1, #0
 64c:	6030      	str	r0, [r6, #0]
 64e:	6073      	str	r3, [r6, #4]
 650:	1c30      	adds	r0, r6, #0
 652:	bc1c      	pop	{r2, r3, r4}
 654:	4690      	mov	r8, r2
 656:	4699      	mov	r9, r3
 658:	46a2      	mov	sl, r4
 65a:	bcf0      	pop	{r4, r5, r6, r7}
 65c:	bc02      	pop	{r1}
 65e:	4708      	bx	r1
 660:	4240      	negs	r0, r0
 662:	2d00      	cmp	r5, #0
 664:	daf1      	bge.n	64a <__bhs_idivmod+0x8a>
 666:	424b      	negs	r3, r1
 668:	e7f0      	b.n	64c <__bhs_idivmod+0x8c>
 66a:	2000      	movs	r0, #0
 66c:	f7ff ff26 	bl	4bc <__aeabi_idiv0>
 670:	2100      	movs	r1, #0
 672:	e7e4      	b.n	63e <__bhs_idivmod+0x7e>
 674:	2401      	movs	r4, #1
 676:	e7bb      	b.n	5f0 <__bhs_idivmod+0x30>

00000678 <__bhs_uldivmod>:
 678:	b5f0      	push	{r4, r5, r6, r7, lr}
 67a:	465f      	mov	r7, fp
 67c:	4656      	mov	r6, sl
 67e:	464d      	mov	r5, r9
 680:	4644      	mov	r4, r8
 682:	b4f0      	push	{r4, r5, r6, r7}
 684:	b087      	sub	sp, #28
 686:	9d10      	ldr	r5, [sp, #64]
 688:	9e11      	ldr	r6, [sp, #68]
 68a:	4681      	mov	r9, r0
 68c:	1c30      	adds	r0, r6, #0
 68e:	9202      	str	r2, [sp, #8]
 690:	9303      	str	r3, [sp, #12]
 692:	4328      	orrs	r0, r5
 694:	d100      	bne.n	698 <__bhs_uldivmod+0x20>
 696:	e0ac      	b.n	7f2 <__bhs_uldivmod+0x17a>
 698:	9c03      	ldr	r4, [sp, #12]
 69a:	4334      	orrs	r4, r6
 69c:	d100      	bne.n	6a0 <__bhs_uldivmod+0x28>
 69e:	e0b5      	b.n	80c <__bhs_uldivmod+0x194>
 6a0:	9803      	ldr	r0, [sp, #12]
 6a2:	9902      	ldr	r1, [sp, #8]
 6a4:	0603      	lsls	r3, r0, #24
 6a6:	0a09      	lsrs	r1, r1, #8
 6a8:	0a02      	lsrs	r2, r0, #8
 6aa:	4319      	orrs	r1, r3
 6ac:	4694      	mov	ip, r2
 6ae:	4688      	mov	r8, r1
 6b0:	4566      	cmp	r6, ip
 6b2:	d901      	bls.n	6b8 <__bhs_uldivmod+0x40>
 6b4:	2701      	movs	r7, #1
 6b6:	e00d      	b.n	6d4 <__bhs_uldivmod+0x5c>
 6b8:	4566      	cmp	r6, ip
 6ba:	d100      	bne.n	6be <__bhs_uldivmod+0x46>
 6bc:	e0dc      	b.n	878 <__bhs_uldivmod+0x200>
 6be:	2701      	movs	r7, #1
 6c0:	0e28      	lsrs	r0, r5, #24
 6c2:	0233      	lsls	r3, r6, #8
 6c4:	1c01      	adds	r1, r0, #0
 6c6:	022a      	lsls	r2, r5, #8
 6c8:	4319      	orrs	r1, r3
 6ca:	3704      	adds	r7, #4
 6cc:	1c15      	adds	r5, r2, #0
 6ce:	1c0e      	adds	r6, r1, #0
 6d0:	458c      	cmp	ip, r1
 6d2:	d26e      	bcs.n	7b2 <__bhs_uldivmod+0x13a>
 6d4:	9c03      	ldr	r4, [sp, #12]
 6d6:	9802      	ldr	r0, [sp, #8]
 6d8:	07a3      	lsls	r3, r4, #30
 6da:	0880      	lsrs	r0, r0, #2
 6dc:	08a1      	lsrs	r1, r4, #2
 6de:	4318      	orrs	r0, r3
 6e0:	468c      	mov	ip, r1
 6e2:	4680      	mov	r8, r0
 6e4:	4566      	cmp	r6, ip
 6e6:	d961      	bls.n	7ac <__bhs_uldivmod+0x134>
 6e8:	2200      	movs	r2, #0
 6ea:	2300      	movs	r3, #0
 6ec:	9204      	str	r2, [sp, #16]
 6ee:	9305      	str	r3, [sp, #20]
 6f0:	2401      	movs	r4, #1
 6f2:	2302      	movs	r3, #2
 6f4:	469a      	mov	sl, r3
 6f6:	46a0      	mov	r8, r4
 6f8:	e033      	b.n	762 <__bhs_uldivmod+0xea>
 6fa:	0071      	lsls	r1, r6, #1
 6fc:	0feb      	lsrs	r3, r5, #31
 6fe:	1c0a      	adds	r2, r1, #0
 700:	431a      	orrs	r2, r3
 702:	006b      	lsls	r3, r5, #1
 704:	9101      	str	r1, [sp, #4]
 706:	9300      	str	r3, [sp, #0]
 708:	9201      	str	r2, [sp, #4]
 70a:	9b00      	ldr	r3, [sp, #0]
 70c:	9c01      	ldr	r4, [sp, #4]
 70e:	9902      	ldr	r1, [sp, #8]
 710:	9a03      	ldr	r2, [sp, #12]
 712:	1ac9      	subs	r1, r1, r3
 714:	41a2      	sbcs	r2, r4
 716:	9102      	str	r1, [sp, #8]
 718:	9203      	str	r2, [sp, #12]
 71a:	465c      	mov	r4, fp
 71c:	4652      	mov	r2, sl
 71e:	4322      	orrs	r2, r4
 720:	1c13      	adds	r3, r2, #0
 722:	1c04      	adds	r4, r0, #0
 724:	9304      	str	r3, [sp, #16]
 726:	9405      	str	r4, [sp, #20]
 728:	9803      	ldr	r0, [sp, #12]
 72a:	4286      	cmp	r6, r0
 72c:	d80f      	bhi.n	74e <__bhs_uldivmod+0xd6>
 72e:	4286      	cmp	r6, r0
 730:	d045      	beq.n	7be <__bhs_uldivmod+0x146>
 732:	9a02      	ldr	r2, [sp, #8]
 734:	9b03      	ldr	r3, [sp, #12]
 736:	9c04      	ldr	r4, [sp, #16]
 738:	1b52      	subs	r2, r2, r5
 73a:	41b3      	sbcs	r3, r6
 73c:	9202      	str	r2, [sp, #8]
 73e:	9303      	str	r3, [sp, #12]
 740:	9805      	ldr	r0, [sp, #20]
 742:	4643      	mov	r3, r8
 744:	4323      	orrs	r3, r4
 746:	1c19      	adds	r1, r3, #0
 748:	1c02      	adds	r2, r0, #0
 74a:	9104      	str	r1, [sp, #16]
 74c:	9205      	str	r2, [sp, #20]
 74e:	3f01      	subs	r7, #1
 750:	2f00      	cmp	r7, #0
 752:	d03a      	beq.n	7ca <__bhs_uldivmod+0x152>
 754:	07b0      	lsls	r0, r6, #30
 756:	08ab      	lsrs	r3, r5, #2
 758:	1c02      	adds	r2, r0, #0
 75a:	431a      	orrs	r2, r3
 75c:	08b1      	lsrs	r1, r6, #2
 75e:	1c15      	adds	r5, r2, #0
 760:	1c0e      	adds	r6, r1, #0
 762:	9804      	ldr	r0, [sp, #16]
 764:	9905      	ldr	r1, [sp, #20]
 766:	0f82      	lsrs	r2, r0, #30
 768:	0084      	lsls	r4, r0, #2
 76a:	008b      	lsls	r3, r1, #2
 76c:	1c10      	adds	r0, r2, #0
 76e:	4318      	orrs	r0, r3
 770:	46a3      	mov	fp, r4
 772:	1c23      	adds	r3, r4, #0
 774:	1c04      	adds	r4, r0, #0
 776:	9304      	str	r3, [sp, #16]
 778:	9405      	str	r4, [sp, #20]
 77a:	9903      	ldr	r1, [sp, #12]
 77c:	9c02      	ldr	r4, [sp, #8]
 77e:	07cb      	lsls	r3, r1, #31
 780:	0862      	lsrs	r2, r4, #1
 782:	431a      	orrs	r2, r3
 784:	084b      	lsrs	r3, r1, #1
 786:	429e      	cmp	r6, r3
 788:	d8ce      	bhi.n	728 <__bhs_uldivmod+0xb0>
 78a:	429e      	cmp	r6, r3
 78c:	d1b5      	bne.n	6fa <__bhs_uldivmod+0x82>
 78e:	4295      	cmp	r5, r2
 790:	d8ca      	bhi.n	728 <__bhs_uldivmod+0xb0>
 792:	e7b2      	b.n	6fa <__bhs_uldivmod+0x82>
 794:	4545      	cmp	r5, r8
 796:	d8a7      	bhi.n	6e8 <__bhs_uldivmod+0x70>
 798:	0fa8      	lsrs	r0, r5, #30
 79a:	00b3      	lsls	r3, r6, #2
 79c:	1c01      	adds	r1, r0, #0
 79e:	00aa      	lsls	r2, r5, #2
 7a0:	4319      	orrs	r1, r3
 7a2:	3701      	adds	r7, #1
 7a4:	1c15      	adds	r5, r2, #0
 7a6:	1c0e      	adds	r6, r1, #0
 7a8:	458c      	cmp	ip, r1
 7aa:	d39d      	bcc.n	6e8 <__bhs_uldivmod+0x70>
 7ac:	45b4      	cmp	ip, r6
 7ae:	d1f3      	bne.n	798 <__bhs_uldivmod+0x120>
 7b0:	e7f0      	b.n	794 <__bhs_uldivmod+0x11c>
 7b2:	458c      	cmp	ip, r1
 7b4:	d184      	bne.n	6c0 <__bhs_uldivmod+0x48>
 7b6:	4590      	cmp	r8, r2
 7b8:	d300      	bcc.n	7bc <__bhs_uldivmod+0x144>
 7ba:	e781      	b.n	6c0 <__bhs_uldivmod+0x48>
 7bc:	e78a      	b.n	6d4 <__bhs_uldivmod+0x5c>
 7be:	9902      	ldr	r1, [sp, #8]
 7c0:	428d      	cmp	r5, r1
 7c2:	d9b6      	bls.n	732 <__bhs_uldivmod+0xba>
 7c4:	3f01      	subs	r7, #1
 7c6:	2f00      	cmp	r7, #0
 7c8:	d1c4      	bne.n	754 <__bhs_uldivmod+0xdc>
 7ca:	9902      	ldr	r1, [sp, #8]
 7cc:	9a03      	ldr	r2, [sp, #12]
 7ce:	464b      	mov	r3, r9
 7d0:	6099      	str	r1, [r3, #8]
 7d2:	60da      	str	r2, [r3, #12]
 7d4:	9804      	ldr	r0, [sp, #16]
 7d6:	9905      	ldr	r1, [sp, #20]
 7d8:	464a      	mov	r2, r9
 7da:	6010      	str	r0, [r2, #0]
 7dc:	6051      	str	r1, [r2, #4]
 7de:	b007      	add	sp, #28
 7e0:	4648      	mov	r0, r9
 7e2:	bc3c      	pop	{r2, r3, r4, r5}
 7e4:	4690      	mov	r8, r2
 7e6:	4699      	mov	r9, r3
 7e8:	46a2      	mov	sl, r4
 7ea:	46ab      	mov	fp, r5
 7ec:	bcf0      	pop	{r4, r5, r6, r7}
 7ee:	bc02      	pop	{r1}
 7f0:	4708      	bx	r1
 7f2:	2000      	movs	r0, #0
 7f4:	2100      	movs	r1, #0
 7f6:	f7ff fea7 	bl	548 <__aeabi_ldiv0>
 7fa:	2300      	movs	r3, #0
 7fc:	2400      	movs	r4, #0
 7fe:	464a      	mov	r2, r9
 800:	6093      	str	r3, [r2, #8]
 802:	60d4      	str	r4, [r2, #12]
 804:	464b      	mov	r3, r9
 806:	6018      	str	r0, [r3, #0]
 808:	6059      	str	r1, [r3, #4]
 80a:	e7e8      	b.n	7de <__bhs_uldivmod+0x166>
 80c:	9a02      	ldr	r2, [sp, #8]
 80e:	1e29      	subs	r1, r5, #0
 810:	d037      	beq.n	882 <__bhs_uldivmod+0x20a>
 812:	0913      	lsrs	r3, r2, #4
 814:	4299      	cmp	r1, r3
 816:	d83a      	bhi.n	88e <__bhs_uldivmod+0x216>
 818:	2501      	movs	r5, #1
 81a:	0109      	lsls	r1, r1, #4
 81c:	3501      	adds	r5, #1
 81e:	4299      	cmp	r1, r3
 820:	d9fb      	bls.n	81a <__bhs_uldivmod+0x1a2>
 822:	2308      	movs	r3, #8
 824:	2000      	movs	r0, #0
 826:	469c      	mov	ip, r3
 828:	2404      	movs	r4, #4
 82a:	2702      	movs	r7, #2
 82c:	2601      	movs	r6, #1
 82e:	e000      	b.n	832 <__bhs_uldivmod+0x1ba>
 830:	0909      	lsrs	r1, r1, #4
 832:	08d3      	lsrs	r3, r2, #3
 834:	0100      	lsls	r0, r0, #4
 836:	428b      	cmp	r3, r1
 838:	d303      	bcc.n	842 <__bhs_uldivmod+0x1ca>
 83a:	00cb      	lsls	r3, r1, #3
 83c:	1ad2      	subs	r2, r2, r3
 83e:	4663      	mov	r3, ip
 840:	4318      	orrs	r0, r3
 842:	0893      	lsrs	r3, r2, #2
 844:	4299      	cmp	r1, r3
 846:	d802      	bhi.n	84e <__bhs_uldivmod+0x1d6>
 848:	008b      	lsls	r3, r1, #2
 84a:	1ad2      	subs	r2, r2, r3
 84c:	4320      	orrs	r0, r4
 84e:	0853      	lsrs	r3, r2, #1
 850:	4299      	cmp	r1, r3
 852:	d802      	bhi.n	85a <__bhs_uldivmod+0x1e2>
 854:	004b      	lsls	r3, r1, #1
 856:	1ad2      	subs	r2, r2, r3
 858:	4338      	orrs	r0, r7
 85a:	4291      	cmp	r1, r2
 85c:	d801      	bhi.n	862 <__bhs_uldivmod+0x1ea>
 85e:	1a52      	subs	r2, r2, r1
 860:	4330      	orrs	r0, r6
 862:	3d01      	subs	r5, #1
 864:	2d00      	cmp	r5, #0
 866:	d1e3      	bne.n	830 <__bhs_uldivmod+0x1b8>
 868:	2300      	movs	r3, #0
 86a:	464c      	mov	r4, r9
 86c:	60a2      	str	r2, [r4, #8]
 86e:	60e3      	str	r3, [r4, #12]
 870:	2300      	movs	r3, #0
 872:	6020      	str	r0, [r4, #0]
 874:	6063      	str	r3, [r4, #4]
 876:	e7b2      	b.n	7de <__bhs_uldivmod+0x166>
 878:	4545      	cmp	r5, r8
 87a:	d800      	bhi.n	87e <__bhs_uldivmod+0x206>
 87c:	e71f      	b.n	6be <__bhs_uldivmod+0x46>
 87e:	2701      	movs	r7, #1
 880:	e728      	b.n	6d4 <__bhs_uldivmod+0x5c>
 882:	2000      	movs	r0, #0
 884:	f7ff fe1a 	bl	4bc <__aeabi_idiv0>
 888:	2200      	movs	r2, #0
 88a:	2300      	movs	r3, #0
 88c:	e7ed      	b.n	86a <__bhs_uldivmod+0x1f2>
 88e:	2501      	movs	r5, #1
 890:	e7c7      	b.n	822 <__bhs_uldivmod+0x1aa>
 892:	46c0      	nop			(mov r8, r8)

00000894 <__bhs_ldivmod>:
 894:	b5f0      	push	{r4, r5, r6, r7, lr}
 896:	465f      	mov	r7, fp
 898:	4656      	mov	r6, sl
 89a:	464d      	mov	r5, r9
 89c:	4644      	mov	r4, r8
 89e:	b4f0      	push	{r4, r5, r6, r7}
 8a0:	b089      	sub	sp, #36
 8a2:	1c1f      	adds	r7, r3, #0
 8a4:	4694      	mov	ip, r2
 8a6:	4b97      	ldr	r3, [pc, #604]	(b04 <__bhs_ldivmod+0x270>)
 8a8:	9a13      	ldr	r2, [sp, #76]
 8aa:	4681      	mov	r9, r0
 8ac:	4013      	ands	r3, r2
 8ae:	17f8      	asrs	r0, r7, #31
 8b0:	4043      	eors	r3, r0
 8b2:	9912      	ldr	r1, [sp, #72]
 8b4:	469b      	mov	fp, r3
 8b6:	17d3      	asrs	r3, r2, #31
 8b8:	1c1d      	adds	r5, r3, #0
 8ba:	1c1e      	adds	r6, r3, #0
 8bc:	404d      	eors	r5, r1
 8be:	1c1c      	adds	r4, r3, #0
 8c0:	4056      	eors	r6, r2
 8c2:	1aed      	subs	r5, r5, r3
 8c4:	41a6      	sbcs	r6, r4
 8c6:	1c31      	adds	r1, r6, #0
 8c8:	4329      	orrs	r1, r5
 8ca:	d100      	bne.n	8ce <__bhs_ldivmod+0x3a>
 8cc:	e0f4      	b.n	ab8 <__bhs_ldivmod+0x224>
 8ce:	1c03      	adds	r3, r0, #0
 8d0:	1c04      	adds	r4, r0, #0
 8d2:	4660      	mov	r0, ip
 8d4:	4058      	eors	r0, r3
 8d6:	405f      	eors	r7, r3
 8d8:	9006      	str	r0, [sp, #24]
 8da:	9707      	str	r7, [sp, #28]
 8dc:	9806      	ldr	r0, [sp, #24]
 8de:	9907      	ldr	r1, [sp, #28]
 8e0:	1ac0      	subs	r0, r0, r3
 8e2:	41a1      	sbcs	r1, r4
 8e4:	9006      	str	r0, [sp, #24]
 8e6:	9107      	str	r1, [sp, #28]
 8e8:	4331      	orrs	r1, r6
 8ea:	d100      	bne.n	8ee <__bhs_ldivmod+0x5a>
 8ec:	e0f1      	b.n	ad2 <__bhs_ldivmod+0x23e>
 8ee:	9807      	ldr	r0, [sp, #28]
 8f0:	9906      	ldr	r1, [sp, #24]
 8f2:	0603      	lsls	r3, r0, #24
 8f4:	0a09      	lsrs	r1, r1, #8
 8f6:	0a02      	lsrs	r2, r0, #8
 8f8:	4319      	orrs	r1, r3
 8fa:	4694      	mov	ip, r2
 8fc:	4688      	mov	r8, r1
 8fe:	4566      	cmp	r6, ip
 900:	d901      	bls.n	906 <__bhs_ldivmod+0x72>
 902:	2701      	movs	r7, #1
 904:	e00d      	b.n	922 <__bhs_ldivmod+0x8e>
 906:	4566      	cmp	r6, ip
 908:	d100      	bne.n	90c <__bhs_ldivmod+0x78>
 90a:	e0ee      	b.n	aea <__bhs_ldivmod+0x256>
 90c:	2701      	movs	r7, #1
 90e:	0e28      	lsrs	r0, r5, #24
 910:	0233      	lsls	r3, r6, #8
 912:	1c01      	adds	r1, r0, #0
 914:	022a      	lsls	r2, r5, #8
 916:	4319      	orrs	r1, r3
 918:	3704      	adds	r7, #4
 91a:	1c15      	adds	r5, r2, #0
 91c:	1c0e      	adds	r6, r1, #0
 91e:	458c      	cmp	ip, r1
 920:	d26f      	bcs.n	a02 <__bhs_ldivmod+0x16e>
 922:	9c07      	ldr	r4, [sp, #28]
 924:	9806      	ldr	r0, [sp, #24]
 926:	07a3      	lsls	r3, r4, #30
 928:	0880      	lsrs	r0, r0, #2
 92a:	08a1      	lsrs	r1, r4, #2
 92c:	4318      	orrs	r0, r3
 92e:	468c      	mov	ip, r1
 930:	4680      	mov	r8, r0
 932:	4566      	cmp	r6, ip
 934:	d962      	bls.n	9fc <__bhs_ldivmod+0x168>
 936:	2200      	movs	r2, #0
 938:	2300      	movs	r3, #0
 93a:	9204      	str	r2, [sp, #16]
 93c:	9305      	str	r3, [sp, #20]
 93e:	2401      	movs	r4, #1
 940:	2302      	movs	r3, #2
 942:	469a      	mov	sl, r3
 944:	46a0      	mov	r8, r4
 946:	e034      	b.n	9b2 <__bhs_ldivmod+0x11e>
 948:	0071      	lsls	r1, r6, #1
 94a:	0feb      	lsrs	r3, r5, #31
 94c:	1c0a      	adds	r2, r1, #0
 94e:	431a      	orrs	r2, r3
 950:	006b      	lsls	r3, r5, #1
 952:	9103      	str	r1, [sp, #12]
 954:	9302      	str	r3, [sp, #8]
 956:	9203      	str	r2, [sp, #12]
 958:	9b02      	ldr	r3, [sp, #8]
 95a:	9c03      	ldr	r4, [sp, #12]
 95c:	9906      	ldr	r1, [sp, #24]
 95e:	9a07      	ldr	r2, [sp, #28]
 960:	1ac9      	subs	r1, r1, r3
 962:	41a2      	sbcs	r2, r4
 964:	9c01      	ldr	r4, [sp, #4]
 966:	9106      	str	r1, [sp, #24]
 968:	9207      	str	r2, [sp, #28]
 96a:	4652      	mov	r2, sl
 96c:	4322      	orrs	r2, r4
 96e:	1c13      	adds	r3, r2, #0
 970:	1c04      	adds	r4, r0, #0
 972:	9304      	str	r3, [sp, #16]
 974:	9405      	str	r4, [sp, #20]
 976:	9807      	ldr	r0, [sp, #28]
 978:	4286      	cmp	r6, r0
 97a:	d810      	bhi.n	99e <__bhs_ldivmod+0x10a>
 97c:	4286      	cmp	r6, r0
 97e:	d100      	bne.n	982 <__bhs_ldivmod+0xee>
 980:	e08c      	b.n	a9c <__bhs_ldivmod+0x208>
 982:	9a06      	ldr	r2, [sp, #24]
 984:	9b07      	ldr	r3, [sp, #28]
 986:	9c04      	ldr	r4, [sp, #16]
 988:	1b52      	subs	r2, r2, r5
 98a:	41b3      	sbcs	r3, r6
 98c:	9206      	str	r2, [sp, #24]
 98e:	9307      	str	r3, [sp, #28]
 990:	9805      	ldr	r0, [sp, #20]
 992:	4643      	mov	r3, r8
 994:	4323      	orrs	r3, r4
 996:	1c19      	adds	r1, r3, #0
 998:	1c02      	adds	r2, r0, #0
 99a:	9104      	str	r1, [sp, #16]
 99c:	9205      	str	r2, [sp, #20]
 99e:	3f01      	subs	r7, #1
 9a0:	2f00      	cmp	r7, #0
 9a2:	d05e      	beq.n	a62 <__bhs_ldivmod+0x1ce>
 9a4:	07b0      	lsls	r0, r6, #30
 9a6:	08ab      	lsrs	r3, r5, #2
 9a8:	1c02      	adds	r2, r0, #0
 9aa:	431a      	orrs	r2, r3
 9ac:	08b1      	lsrs	r1, r6, #2
 9ae:	1c15      	adds	r5, r2, #0
 9b0:	1c0e      	adds	r6, r1, #0
 9b2:	9804      	ldr	r0, [sp, #16]
 9b4:	9905      	ldr	r1, [sp, #20]
 9b6:	0f82      	lsrs	r2, r0, #30
 9b8:	0084      	lsls	r4, r0, #2
 9ba:	008b      	lsls	r3, r1, #2
 9bc:	1c10      	adds	r0, r2, #0
 9be:	4318      	orrs	r0, r3
 9c0:	9401      	str	r4, [sp, #4]
 9c2:	1c23      	adds	r3, r4, #0
 9c4:	1c04      	adds	r4, r0, #0
 9c6:	9304      	str	r3, [sp, #16]
 9c8:	9405      	str	r4, [sp, #20]
 9ca:	9907      	ldr	r1, [sp, #28]
 9cc:	9c06      	ldr	r4, [sp, #24]
 9ce:	07cb      	lsls	r3, r1, #31
 9d0:	0862      	lsrs	r2, r4, #1
 9d2:	431a      	orrs	r2, r3
 9d4:	084b      	lsrs	r3, r1, #1
 9d6:	429e      	cmp	r6, r3
 9d8:	d8cd      	bhi.n	976 <__bhs_ldivmod+0xe2>
 9da:	429e      	cmp	r6, r3
 9dc:	d1b4      	bne.n	948 <__bhs_ldivmod+0xb4>
 9de:	4295      	cmp	r5, r2
 9e0:	d8c9      	bhi.n	976 <__bhs_ldivmod+0xe2>
 9e2:	e7b1      	b.n	948 <__bhs_ldivmod+0xb4>
 9e4:	4545      	cmp	r5, r8
 9e6:	d8a6      	bhi.n	936 <__bhs_ldivmod+0xa2>
 9e8:	0fa8      	lsrs	r0, r5, #30
 9ea:	00b3      	lsls	r3, r6, #2
 9ec:	1c01      	adds	r1, r0, #0
 9ee:	00aa      	lsls	r2, r5, #2
 9f0:	4319      	orrs	r1, r3
 9f2:	3701      	adds	r7, #1
 9f4:	1c15      	adds	r5, r2, #0
 9f6:	1c0e      	adds	r6, r1, #0
 9f8:	458c      	cmp	ip, r1
 9fa:	d39c      	bcc.n	936 <__bhs_ldivmod+0xa2>
 9fc:	45b4      	cmp	ip, r6
 9fe:	d1f3      	bne.n	9e8 <__bhs_ldivmod+0x154>
 a00:	e7f0      	b.n	9e4 <__bhs_ldivmod+0x150>
 a02:	458c      	cmp	ip, r1
 a04:	d183      	bne.n	90e <__bhs_ldivmod+0x7a>
 a06:	4590      	cmp	r8, r2
 a08:	d300      	bcc.n	a0c <__bhs_ldivmod+0x178>
 a0a:	e780      	b.n	90e <__bhs_ldivmod+0x7a>
 a0c:	e789      	b.n	922 <__bhs_ldivmod+0x8e>
 a0e:	2501      	movs	r5, #1
 a10:	2308      	movs	r3, #8
 a12:	2000      	movs	r0, #0
 a14:	469c      	mov	ip, r3
 a16:	2404      	movs	r4, #4
 a18:	2702      	movs	r7, #2
 a1a:	2601      	movs	r6, #1
 a1c:	e000      	b.n	a20 <__bhs_ldivmod+0x18c>
 a1e:	0912      	lsrs	r2, r2, #4
 a20:	08cb      	lsrs	r3, r1, #3
 a22:	0100      	lsls	r0, r0, #4
 a24:	4293      	cmp	r3, r2
 a26:	d303      	bcc.n	a30 <__bhs_ldivmod+0x19c>
 a28:	00d3      	lsls	r3, r2, #3
 a2a:	1ac9      	subs	r1, r1, r3
 a2c:	4663      	mov	r3, ip
 a2e:	4318      	orrs	r0, r3
 a30:	088b      	lsrs	r3, r1, #2
 a32:	429a      	cmp	r2, r3
 a34:	d802      	bhi.n	a3c <__bhs_ldivmod+0x1a8>
 a36:	0093      	lsls	r3, r2, #2
 a38:	1ac9      	subs	r1, r1, r3
 a3a:	4320      	orrs	r0, r4
 a3c:	084b      	lsrs	r3, r1, #1
 a3e:	429a      	cmp	r2, r3
 a40:	d802      	bhi.n	a48 <__bhs_ldivmod+0x1b4>
 a42:	0053      	lsls	r3, r2, #1
 a44:	1ac9      	subs	r1, r1, r3
 a46:	4338      	orrs	r0, r7
 a48:	428a      	cmp	r2, r1
 a4a:	d801      	bhi.n	a50 <__bhs_ldivmod+0x1bc>
 a4c:	1a89      	subs	r1, r1, r2
 a4e:	4330      	orrs	r0, r6
 a50:	3d01      	subs	r5, #1
 a52:	2d00      	cmp	r5, #0
 a54:	d1e3      	bne.n	a1e <__bhs_ldivmod+0x18a>
 a56:	2400      	movs	r4, #0
 a58:	9106      	str	r1, [sp, #24]
 a5a:	9407      	str	r4, [sp, #28]
 a5c:	2500      	movs	r5, #0
 a5e:	9004      	str	r0, [sp, #16]
 a60:	9505      	str	r5, [sp, #20]
 a62:	4659      	mov	r1, fp
 a64:	2900      	cmp	r1, #0
 a66:	db21      	blt.n	aac <__bhs_ldivmod+0x218>
 a68:	9804      	ldr	r0, [sp, #16]
 a6a:	9905      	ldr	r1, [sp, #20]
 a6c:	465b      	mov	r3, fp
 a6e:	07db      	lsls	r3, r3, #31
 a70:	d519      	bpl.n	aa6 <__bhs_ldivmod+0x212>
 a72:	9c06      	ldr	r4, [sp, #24]
 a74:	9d07      	ldr	r5, [sp, #28]
 a76:	2300      	movs	r3, #0
 a78:	4262      	negs	r2, r4
 a7a:	41ab      	sbcs	r3, r5
 a7c:	464d      	mov	r5, r9
 a7e:	60aa      	str	r2, [r5, #8]
 a80:	60eb      	str	r3, [r5, #12]
 a82:	b009      	add	sp, #36
 a84:	464a      	mov	r2, r9
 a86:	6010      	str	r0, [r2, #0]
 a88:	6051      	str	r1, [r2, #4]
 a8a:	4648      	mov	r0, r9
 a8c:	bc3c      	pop	{r2, r3, r4, r5}
 a8e:	4690      	mov	r8, r2
 a90:	4699      	mov	r9, r3
 a92:	46a2      	mov	sl, r4
 a94:	46ab      	mov	fp, r5
 a96:	bcf0      	pop	{r4, r5, r6, r7}
 a98:	bc02      	pop	{r1}
 a9a:	4708      	bx	r1
 a9c:	9906      	ldr	r1, [sp, #24]
 a9e:	428d      	cmp	r5, r1
 aa0:	d900      	bls.n	aa4 <__bhs_ldivmod+0x210>
 aa2:	e77c      	b.n	99e <__bhs_ldivmod+0x10a>
 aa4:	e76d      	b.n	982 <__bhs_ldivmod+0xee>
 aa6:	9a06      	ldr	r2, [sp, #24]
 aa8:	9b07      	ldr	r3, [sp, #28]
 aaa:	e7e7      	b.n	a7c <__bhs_ldivmod+0x1e8>
 aac:	9a04      	ldr	r2, [sp, #16]
 aae:	9b05      	ldr	r3, [sp, #20]
 ab0:	2100      	movs	r1, #0
 ab2:	4250      	negs	r0, r2
 ab4:	4199      	sbcs	r1, r3
 ab6:	e7d9      	b.n	a6c <__bhs_ldivmod+0x1d8>
 ab8:	2000      	movs	r0, #0
 aba:	2100      	movs	r1, #0
 abc:	f7ff fd44 	bl	548 <__aeabi_ldiv0>
 ac0:	1c03      	adds	r3, r0, #0
 ac2:	1c0c      	adds	r4, r1, #0
 ac4:	9304      	str	r3, [sp, #16]
 ac6:	9405      	str	r4, [sp, #20]
 ac8:	2200      	movs	r2, #0
 aca:	2300      	movs	r3, #0
 acc:	9206      	str	r2, [sp, #24]
 ace:	9307      	str	r3, [sp, #28]
 ad0:	e7c7      	b.n	a62 <__bhs_ldivmod+0x1ce>
 ad2:	9906      	ldr	r1, [sp, #24]
 ad4:	1e2a      	subs	r2, r5, #0
 ad6:	d00d      	beq.n	af4 <__bhs_ldivmod+0x260>
 ad8:	090b      	lsrs	r3, r1, #4
 ada:	429a      	cmp	r2, r3
 adc:	d897      	bhi.n	a0e <__bhs_ldivmod+0x17a>
 ade:	2501      	movs	r5, #1
 ae0:	0112      	lsls	r2, r2, #4
 ae2:	3501      	adds	r5, #1
 ae4:	429a      	cmp	r2, r3
 ae6:	d9fb      	bls.n	ae0 <__bhs_ldivmod+0x24c>
 ae8:	e792      	b.n	a10 <__bhs_ldivmod+0x17c>
 aea:	4545      	cmp	r5, r8
 aec:	d800      	bhi.n	af0 <__bhs_ldivmod+0x25c>
 aee:	e70d      	b.n	90c <__bhs_ldivmod+0x78>
 af0:	2701      	movs	r7, #1
 af2:	e716      	b.n	922 <__bhs_ldivmod+0x8e>
 af4:	2000      	movs	r0, #0
 af6:	f7ff fce1 	bl	4bc <__aeabi_idiv0>
 afa:	2100      	movs	r1, #0
 afc:	2200      	movs	r2, #0
 afe:	9106      	str	r1, [sp, #24]
 b00:	9207      	str	r2, [sp, #28]
 b02:	e7ab      	b.n	a5c <__bhs_ldivmod+0x1c8>
 b04:	80000000 	.word	0x80000000
 b08:	6c6c6548 	.word	0x6c6c6548
 b0c:	6f57206f 	.word	0x6f57206f
 b10:	0a646c72 	.word	0x0a646c72
 b14:	657a6953 	.word	0x657a6953
 b18:	6425203a 	.word	0x6425203a
 b1c:	25783020 	.word	0x25783020
 b20:	69000a58 	.word	0x69000a58
 b24:	6425203a 	.word	0x6425203a
 b28:	25783020 	.word	0x25783020
 b2c:	0a58      	.short	0x0a58
 b2e:	00          	.byte	0x00
 b2f:	28          	.byte	0x28
 b30:	6c6c756e 	.word	0x6c6c756e
 b34:	0029      	.short	0x0029
